SweetLow
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MTRRcap Register:
000000FE 0000000000000D08
Variable MTRR Count: 8
Fixed MTRR Supported: TRUE
Write-combining (WC) Memory Type Supported: TRUE
SMM Memory Range Registers (SMRR) Supported: TRUE
MTRRdefType Register:
000002FF 0000000000000C00
Default Cache Type: 00h Uncacheable
Variable MTRR Enabled: TRUE
Fixed MTRR Enabled: TRUE
Detected Processor Physical Address Size (bits): 36
Variable MTRRs - Base, Mask and Decription:
00000200 0000000000000006 0000000F00000800 4G @ 0 / WB
00000202 00000000E0000000 0000000FE0000800 512M @ 3G 512M / UC
00000204 0000000100000006 0000000F00000800 4G @ 4G / WB
00000206 0000000200000006 0000000FE0000800 512M @ 8G / WB
00000208 00000000DFF00000 0000000FFFF00800 1M @ 3G 511M / UC
0000020A 0000000000000000 0000000000000000 Not used
0000020C 0000000000000000 0000000000000000 Not used
0000020E 0000000000000000 0000000000000000 Not used
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